CMOS image devices having pixel sensor arrays are well known in the art and have been widely used due to their low voltage operation and low power consumption. CMOS image devices further have advantages of being compatible with integrated on-chip electronics, allowing random access to the image data, and having lower fabrication costs as compared to other imaging technologies. CMOS image devices are generally disclosed for example, in Nixon et al., “256×256 CMOS Active Pixel Sensor Camera-on-a-Chip,” IEEE Journal of Solid State Circuits, vol. 31(12) pp. 2046-2050, 1996; Mendis et al., CMOS Active Pixel Image Sensors,” IEEE Transactions on Electron Devices, vol. 41(3) pp. 452-453, 1994 as well as U.S. Pat. Nos. 5,708,263, 5,471,515, and 6,291,280, which are hereby incorporated by reference.
However, conventional CMOS image devices have some significant drawbacks. When photodiode implants are formed within a semiconductor substrate of a pixel cell adjacent a transfer transistor to transfer charge from the photodiode, the resulting structure creates leakage problems beneath the transfer gate, particularly during charge integration, when the transfer transistor is off. FIG. 1 illustrates a prior art pixel cell 750 with a n-type photodiode implant 705 set in a p-type substrate 915, wherein the implant is on one side of transfer gate 701, with a floating diffusion region 702 on the opposite side of gate 701. STI region 707 is an isolation region which isolates one pixel from another. The n-type photodiode implant 705 forms a P—N diode junction above implant 705 with the p-type material which is over implant 705.
The photodiode implant 705 is typically formed using an implant angle θ(706) in order to extend the implant slightly under gate 701 to provide sufficient conductivity between the photodiode n-region 705 and the channel region beneath transfer gate 701. Once implanted, the resulting extended photodiode n-region 705 facilitates transfer of electrons to the channel beneath gate 701 and to the floating diffusion 702 when the gate 701 is on (e.g., a positive voltage applied which is greater than the threshold of the transfer transistor formed by gate 701 and implant regions 702, 705). However, as is shown in FIG. 2, when transfer gate 701 is off, residual charge from n-region 705 leaks in the direction of arrows 800 beneath transfer gate 701 to floating diffusion region 702. This is due to the fact that the shallow angled implant results in a shape for n-region 705, where a portion of the photodiode is in very close proximity to the transfer gate 701. This proximity, while providing a good charge transfer when gate 701 is on, has the unwanted by-product of some undesirable charge leakage when the gate 701 is off. Accordingly, a better photodiode implant which provides good charge transfer when gate 701 is on, while lowering leakage when gate 701 is off is needed.